
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 2 TO 5
User’s Manual U15905EJ2V1UD
242
8.3
Control Registers
The following two registers are used to control 8-bit timer/event counter n.
 Timer clock selection register n (TCLn)
 8-bit timer mode control register n (TMCn)
Remark
To use the functions of the TIn and TOn pins, refer to Table 4-18 Using Alternate Function of Port
Pins.
(1) Timer clock selection registers 2 to 5 (TCL2 to TCL5)
These registers set the count clock of 8-bit timer/event counter n and the valid edge of the TIn pin input.
The TCLn register can be read or written in 8-bit units.
These registers are cleared to 00H after reset.
(a) Timer clock selection registers 2 and 3 (TCL2 and TCL3)
Falling edge of TIn
Rising edge of TIn
fXX/4
fXX/8
fXX/16
fXX/32
fXX/128
fXX/512
Count clock selection
TCLn2
0
1
TCLn1
0
1
0
1
TCLn0
0
1
0
1
0
1
0
1
20 MHz
10 MHz
200 ns
400 ns
800 ns
1.6
s
6.4
s
25.6
s
400 ns
800 ns
1.6
s
3.2
s
12.8
s
51.2
s
Clock
fXX
0
TCLn
(n = 2, 3)
0
TCLn2
TCLn1
TCLn0
After reset: 00H
R/W
Address: TCL2 FFFFF644H, TCL3 FFFFF645H
7
6
54
32
1
0
Cautions 1. Before overwriting the TCLn register with different data, stop the timer operation.
2. TI2 and TI3 are used alternately as P01/INTP0 and P02/INTP2, respectively, so when using
the TIn pin function, set the PMC01 or PMC02 bit of the PMC0 register to 1 before starting
timer operation. Edge detection may not be correctly performed if the bit is manipulated
after the timer starts operating.
Remark
When TCL2 and TCL3 are connected in cascade, the TCL3 register settings are invalid.